Modern communication and data networks comprise nodes, such as routers, switches, and/or bridges that transport data through the network. The routing functions within a node may be managed by specialized application-specific integrated circuits (ASIC) and other customized hard-coded logic components. ASICs and other customized hard-coded logic components may increase routing performance using dedicated logic to perform routing functions. For instance, the dedicated logic may perform routing functions in a parallel fashion that may require serial processing when implemented using software. Unfortunately, ASICs and other customized hard-coded logic components have a limited repertoire of functionality, and thus lack component flexibility.
General-purpose network processors may provide a more flexible design than ASIC and other customized hard-coded logic components. General-purpose network processors improve flexibility be utilizing encoded software to implement routing functions. New features, services, and protocols may be added to the general-purpose network processor with software-only changes. Although general-purpose network processors improve flexibility, the general-purpose network processors are often less efficient, more expensive, and consume more power than ASICs and other hard-coded components. Thus, in many instances, nodes that deploy ASIC or other hard-coded components may be the design preference for nodes processing data packets.
When routing packets, a node may look up the destination address of an incoming data packet to retrieve the routing information. Nodes may employ an egress physical port bitmap that uses bits to represent the physical ports of a node. For example, a node may use a 64 element bitmap to represent 64 different physical ports. To improve routing capacity and efficiency, a node that comprises an ASIC or other customized hard-coded logic component may utilize an auxiliary lookup mechanism to manage a set of egress physical ports that receive the outgoing data packets. Implementation of the auxiliary lookup mechanism may provide more flexibility during the routing process. For example, the auxiliary lookup mechanism may completely overwrite an existing egress physical port bitmap with a new egress physical port bitmap to designate a new set of egress physical ports. An auxiliary lookup mechanism may also mask the set of egress physical ports or increase the number of egress physical ports in the set. However, impractical bitmap sizes and hardware inflexibility impede applying an auxiliary lookup mechanism at the logical port or per virtual local area network (VLAN) level. A design alternative may be to use network processors to apply the auxiliary lookup mechanism at the logical port or VLAN level using encoded software. Nonetheless, as discussed earlier, use of general-purpose network processors may not only decrease performance, but increase cost and power consumption. Thus, other innovative solutions are necessary to manage the routing process for nodes that comprise ASICs or other customized hard-coded logic components.